| 000 |
|
01521nam0 2200325 450 |
| 010 |
__ |
■a978-7-121-11852-4■dCNY48.00■z7-121-11852-1 |
| 100 |
__ |
■a20120316d2010 em y0chiy50 ea |
| 101 |
1_ |
■achi■ceng |
| 102 |
__ |
■aCN■b110000 |
| 105 |
__ |
■aak z 000yy |
| 106 |
__ |
■ar |
| 200 |
1_ |
■aFPGA数字逻辑设计教程■d= Digital design using digilent FPGA boards■+...... |
| 210 |
__ |
■a北京■c电子工业出版社■d2010.09 |
| 215 |
__ |
■aX, 326页■c图■d26cm |
| 300 |
__ |
■a其他题名:Verilog |
| 306 |
__ |
■a由美国DIGILENT科技有限公司授权 |
| 330 |
__ |
■a本书系统地介绍了利用Verilog硬件描述语言进行数字电路设计和FPGA开发的方法。其中, 第1-4章系统地介绍了数+...... |
| 500 |
10 |
■aDigital design using digilent FPGA boards: Verilog/active-+...... |
| 517 |
1_ |
■aVerilog■AVerilog |
| 606 |
0_ |
■a可编程序逻辑器件■j教材■x系统设计■Ake bian cheng xu luo ji qi jian |
| 690 |
__ |
■aTP332.1■v4 |
| 701 |
_1 |
■aHaskell,■bRichard E.■4著■AHaskell, |
| 701 |
_1 |
■aHanna,■bDarrin M.■4著■AHanna, |
| 702 |
_0 |
■a陈华锋■4译■Achen hua feng |
| 702 |
_0 |
■a郑利浩■4译■Azheng li hao |
| 702 |
_0 |
■a王荃■4译■Awang quan |
| 801 |
_0 |
■aCN■bRENTIAN■c20101025 |
| 801 |
_2 |
■aCN■bGSXY■c20120316 |
| 905 |
__ |
■aGSXY■fTP332.1/H131 |
| 999 |
__ |
■tC■Ayw1■a20120316 09:16:56■Myw1■m20120316 09:17:16 |